State of the art CMOS image sensors have typically three or more transistors per pixel and are addressed and reset with two or more row lines. The pixels are also supplied with a power supply line and the output is obtained through a column sense line.
A typical circuit schematic diagram 101 of a standard CMOS pixel is shown in FIG. 1. As light impinges on the pixel photodiode 102, the diode is discharged and the resulting voltage of node 111 is supplied to the gate of the sensing transistor 103. When a particular row “Yn” is ready to be addressed, the addressing signal is applied to line 108, which turns the transistor 104 on. This connects the signal appearing on the source of the transistor 103 through the interconnect 107 to column line 112. The current source load 113 loads the column sense line “Xm”. After the sensing is completed, the reset line 109 is pulsed, which resets the node 111 through the reset transistor 105 to the original level.
The whole cycle of sensing and resetting is periodically repeated when the sensor is used in a movie mode or is terminated just after one cycle when the sensor is used in a still picture mode. The drain of the reset transistor 105 is connected together with the drain of the sense transistor 103, and further through the interconnect 106 to the Vdd bus line 110. Separate lines for the reset and Vdd are also possible. The voltage waveform that appears on the node 111 is shown in the graph 201 in FIG. 2. When the reset pulse 204 is applied to the pixel, the node voltage is reset to level 205 that corresponds to dark signal. The light impinging on the photodiode 102 gradually discharges the node causing the node voltage to follow an approximately linear line 202 assuming that the light intensity is constant. When an address pulse 203 is applied to the pixel, the source voltage is sensed and delivered to column processing circuits. The new reset pulse 204 then restores the pixel original dark level 205. More information about Active Pixel Image (APS) Sensor design and operation can be found in the paper: “CMOS Image Sensor: Electronic Camera On a Chip” Eric Fossum published in the IEDM Technical Digest 1995 pp. 17-25. Additional information is also available in the U.S. Pat. No. 5,471,575 to Fossum at al.
APS image sensors have advantages in low power consumption, high speed, require only low bias voltages, and can be produced with low cost. However, the complexity of the pixel design leads to a sacrifice of some light collecting area, which ultimately results in lower QE. Another disadvantage is in pixel-offset non-uniformities that are caused by the threshold variations of pixel transistors. The resulting pixel signal has to be processed to remove these non-uniformities. Pixels in each column can share the column processing circuitry, however, these circuits typically require at least two large capacitors for the offset subtraction and data storage, which may consume a significant portion of the chip area. Another problem resulting from the complex pixel circuitry is the need for several contacts between the transistor gates, source and drain regions, and metal busing. The pixel circuit 101, shown in FIG. 1, requires at least three contacts. The contacts are also consuming pixel area, obstruct light, and prevent pixel size reduction beyond a certain limit. It is therefore desirable to reduce the pixel complexity and more importantly to reduce the number of in-pixel contacts. It is also desirable to simplify the pixel-offset non-uniformity processing circuits and minimize the number of large signal storage capacitors in each column.
It is the purpose of this invention to teach how to overcome the above-described limitations and how to achieve, small pixel size, fewer transistors per pixel, and fewer in-pixel contacts, and to teach how to compensate pixel offset non-uniformities by storing the corrective signal in the pixel itself. The prior art does not show how to design an Active Pixel CMOS image sensor with a small pixel size that has only two transistors per pixel and only two in-pixel contacts. The prior art does not teach how to compensate for pixel offset non-uniformities by storing the error-compensating signal in the pixel itself. Finally the prior art does not teach how to improve the image sensor performance at low biasing voltages by bootstrapping the reset gate signal.